| AD7725 Description |
| 16-Bit Sigma Delta ADC with a Programmable Post Processor |
| AD7725 Vendor |
| Analog Devices |
| AD7725 Categories |
|
| AD7725 Features |
- Programmable Filtering
- Any Characteristic up to 108 Tap FIR and/or IIR - Polynomial Signal Conditioning up to 8th Order
- Programmable Decimation and Output Word Rate
- Flexible Programming Modes
- Boot from DSP or External EPROM
- Parallel/Serial Interface
- Internal Default Filter for Evaluation
- 14.4 MHz Max Master Clock Frequency
- 0 V to +4 V (Single-Ended) or ±2 V (Differential) Input Range
- Power Supplies: AVDD, DVDD: 5 V ± 5%
- On-Chip 2.5 V Voltage Reference
- 44-Lead MQFP Package
|
| AD7725 Datasheet and Application Notes |
|
| Parameter | Value |
| Res (Bits) | 16bit |
| Thruput Rate | 900KSPS |
| # of ADC Inputs | 1 |
| Supply V | Single(+5) |
| Pwr Diss (max) | 615mW |
| Interface | Par, Ser |
| Ain Range | 4 V p-p, Uni 4.0V |
| SNR (dB) | 83dB |
| Pkg Type | QFP |
| Products related to AD7725 |
| AD7725BS |