AD9430-LVDS/PCB

AD9430-LVDS/PCB Manufacturer

AD9430-LVDS/PCB Description

AD9430-LVDS/PCB Description

AD9430-LVDS/PCB Categories

AD9430-LVDS/PCB Datasheet (PDF)

AD9430-LVDS/PCB Price & Availability

AD9430-LVDS/PCB Features

• SNR = 65 dB @ Fin up to 70 MHz @ 210 MSPS
• ENOB of 10.6 @ Fin up to 70 MHz @ 210 MSPS
• SFDR = 80 dBc @ Fin up to 70 MHz @ 210 MSPS
• Excellent Linearity:
  
  - DNL = ±0.3 LSB (Typical)
  
  - INL = ±0.5 LSB (Typical)
• Two Output Data Options:
  
  - Demultiplexed 3.3 V CMOS Outputs Each @ 105 MSPS
  
  - Interleaved or Parallel Data Output Option
  
  - LVDS at 210 MSPS

• 700 MHz Full Power Analog Bandwidth
• Power Dissipation = 1.3 W Typical @ 210 MSPS
• 1.5 V Input Voltage Range
• 3.3 V Supply Operation
• Output Data Format Option
• Data Sync Input and Data Clock Output Provided
• Clock Duty Cycle Stabilizer

AD9430-LVDS/PCB Parameters

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