Catalog Categories Part Numbers Manufacturers Search

AD9433BSQ-105

AD9433BSQ-105 Manufacturer

AD9433BSQ-105 Description

AD9433BSQ-105 Description

AD9433BSQ-105 Categories

AD9433BSQ-105 Datasheet (PDF)

AD9433BSQ-105 Price & Availability


Check AD9433BSQ-105 Price & Availability at Canics

AD9433BSQ-105 Features

  • IF Sampling up to 350 MHz
  • SNR = 67.5 dB, Fin up to Nyquist at 105 MSPS
  • SFDR = 83 dBc, 70 MHz Fin at 105 MSPS
  • SFDR = 72 dBc, 150 MHz Fin at 105 MSPS
  • 2 Vp-p Analog Input Range Option
  • On-Chip Clock Duty Cycle Stabilization
  • On-Chip Reference and Track/Hold
  • SFDR Optimization Circuit
  • Excellent Linearity

    - DNL = ± 0.25 LSB (Typ)

    - INL = ± 0.5 LSB (Typ)
  • 750 MHz Full Power Analog Bandwidth
  • Power Dissipation = 1.35W at 125 MSPS
  • Two's Complement or Offset Binary Data Format

AD9433BSQ-105 Parameters

Products Similar to AD9433BSQ-105


 

Keywords
AD9433BSQ-105 Data Sheet AD9433BSQ-105 Spec AD9433BSQ-105 Application Notes AD9433BSQ-105 Distributor
AD9433BSQ-105 Circuit AD9433BSQ-105 Reference AD9433BSQ-105 PDF AD9433BSQ-105 RoHS