CY2DP814 Datasheet - 1:4 Clock Fanout Buffer

CY2DP814 Description
1:4 Clock Fanout Buffer
CY2DP814 Vendor
Cypress
CY2DP814 Categories
Clock Fanout Buffers
CY2DP814 Features
Low voltage operation V_DD = 3.3V 1:4 fanout Single-input configurable for LVDS, LVPECL, or LVTTL Four differential pairs of LVPECL outputs Drives 50-ohm load Low input capacitance Low output skew Low propagation delay Typical (tpd < 4 ns) Industrial versions available Available packages include TSSOP, SOIC
CY2DP814 Datasheet and Application Notes
CY2DP814 Datasheet
Parameter	Value
Features	1:4 Differential to LVPECL Clk Fanout Buffer
Functions	1:4 Fanout
Outputs	4
Voltage (V)	3.3
Operating Range	Commercial/Industrial
Package	16 SOIC / 16 TSSOP
Status	*Full Production
Products related to CY2DP814
CY2DP814ZI CY2DP814ZC CY2DP814SI CY2DP814SC

ChipCatalog.com - Your Source of Information About Electronic Components