CY2DP818 Datasheet - 1:8 Clock Fanout Buffer

CY2DP818 Description
1:8 Clock Fanout Buffer
CY2DP818 Vendor
Cypress
CY2DP818 Categories
Clock Fanout Buffers
CY2DP818 Features
Low-voltage operation V_DD = 3.3V 1:8 fanout Single-input-configurable for LVDS, LVPECL, or LVTTL 8 pair of LVPECL outputs Drives a 50-ohm load Low input capacitance Low output skew Low propagation delay Typical (tpd < 4 ns) Industrial versions available Package available include: TSSOP Does not exceed Bellcore 802.3 standards Operation at » 350 MHz–700 Mbps
CY2DP818 Datasheet and Application Notes
CY2DP818 Datasheet
Parameter	Value
Features	1:8 Differential to LVPECL Clk Fanout Buffer
Functions	1:8 Fanout
Outputs	8
Voltage (V)	3.3
Operating Range	Commercial/Industrial
Package	38 TSSOP
Status	*Full Production
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