CY6116A-35LMB

CY6116A-35LMB Manufacturer

CY6116A-35LMB Description

CY6116A-35LMB Datasheet (PDF)

CY6116A-35LMB Price & Availability

CY6116A-35LMB Features

• Automatic power-down when deselected
• CMOS for optimum speed/power
• High speed
• 20 ns
• Low active power
• 550 mW
• Low standby power
• 110 mW
• TTL-compatible inputs and outputs
• Capable of withstanding greater than 2001V electrostatic discharge

CY6116A-35LMB Description

The CY6116A and CY6117A are high-performance CMOS static RAMs organized as 2048 words by 8 its. Easy memory expansion is provided by an active LOW chip enable (/CE) and active LOW output enable (/OE), and three-state drivers. The CY6116A and CY6117A have and automatic power-down feature, reducing the power consumption by 83% when deselected.

Writing to the device is accomplished when the chip enable (/CE) and write enable (/WE) inputs are both LOW. Data on the I/O pins (I/O₀ through I/O₇) is written to the memory location specified on the address pins (A₀ through A₁₀).

Reading the device is accomplished by taking chip enable (/CE) and output enable (/OE) LOW while write enable (/WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the I/O pins.

The I/O pins remain in high-impedance state when chip enable (/CE) is HIGH or write enable (/WE) is LOW.

The CY6116A and CY6117A utilize a die coat to insure alpha immunity.

CY6116A-35LMB Parameters

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