CY62126BVLL-55ZI | ||||||||
CY62126BVLL-55ZI ManufacturerCY62126BVLL-55ZI DescriptionCY62126BVLL-55ZI Datasheet (PDF)CY62126BVLL-55ZI Price & AvailabilityCY62126BVLL-55ZI Features
CY62126BVLL-55ZI DescriptionThe CY62126BV MoBL® is a high-performance CMOS static RAM organized as 64K words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption by 99% when deselected. The device enters power-down mode when /CE is HIGH. Writing to the device is accomplished by taking Chip Enable (/CE) and Write Enable (/WE) inputs LOW. If Byte Low Enable (/BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (/BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A15). Reading from the device is accomplished by taking Chip Enable (/CE) and Output Enable (/OE) LOW while forcing the write enable (/WE) HIGH. If Byte Low Enable (/BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable (/BHE) is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of this data sheet for a complete description of read and write modes. The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (/CE HIGH), the outputs are disabled (/OE HIGH), the /BHE and /BLE are disabled (/BHE, /BLE HIGH), or during a write operation (/CE LOW, and /WE LOW). CY62126BVLL-55ZI ParametersProducts Similar to CY62126BVLL-55ZIKeywords
|