The CY62128V is composed of high-performance CMOS static RAMs organized as 128K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (/CE₁), an active HIGH Chip Enable (CE₂), an active LOW Output Enable (/OE) and three-state drivers. These devices have an automatic power-down feature, reducing the power consumption by over 99% when deselected.

Writing to the device is accomplished by taking Chip Enable one (/CE₁) and Write Enable (/WE) inputs LOW and the Chip Enable two (CE₂) input HIGH. Data on the eight I/O pins (I/O₀ through I/O₇) is then written into the location specified on the address pins (A₀ through A₁₆).

Reading from the device is accomplished by taking Chip Enable one (/CE₁) and Output Enable (/OE) LOW while forcing Write Enable (/WE) and Chip Enable two (CE₂) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O₀ through I/O₇) are placed in a high-impedance state when the device is deselected (/CE₁ HIGH or CE₂ LOW), the outputs are disabled (/OE HIGH), or during a write operation (/CE₁ LOW, CE₂ HIGH, and /WE LOW).