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CY62136VLL-70BAI

CY62136VLL-70BAI Manufacturer

Cypress

CY62136VLL-70BAI Description

2M (128K x 16) Static RAM

CY62136VLL-70BAI Categories

128Kx16 SRAM

CY62136VLL-70BAI Datasheet (PDF)

CY62136VLL-70BAI Datasheet

CY62136VLL-70BAI Price & Availability


Check CY62136VLL-70BAI Price & Availability at Canics

CY62136VLL-70BAI Features

  • High speed: 55 ns and 70 ns
  • Wide voltage range: 2.7V-3.6V
  • Ultra-low active, standby power
  • Easy memory expansion with /CE and /OE features
  • TTL-compatible inputs and outputs
  • Automatic power-down when deselected
  • CMOS for optimum speed/power
  • Package available in a standard 44-pin TSOP Type II (forward pinout) package

CY62136VLL-70BAI Description

    The CY62136V is a high-performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery LifeTM (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (/CE HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (/CE HIGH), outputs are disabled (/OE HIGH), /BHE and /BLE are disabled (/BHE, /BLE HIGH), or during a write operation (/CE LOW, and /WE LOW).

    Writing to the device is accomplished by taking Chip Enable (/CE) and Write Enable (/WE) inputs LOW. If Byte Low Enable (/BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16).

    Reading from the device is accomplished by taking Chip Enable (/CE) and Output Enable (/OE) LOW while forcing the Write Enable (/WE) HIGH. If Byte Low Enable (/BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (/BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes.

    CY62136VLL-70BAI Parameters

    Vcc (V)3.0
    Density2MB
    Organization128Kb x16
    100-999 qty $4.50
    Voltage Range2.7 to 3.6
    CommentsFor fBGA pkgs, use CY62136CV30
    PowerLL, SL
    Select parameters and click to see components with these parameters.

    Products Similar to CY62136VLL-70BAI

    CY62136V, CY62136VLL-55BAI, CY62136VLL-55ZI, CY62136VLL-70ZI

     
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