CY62137VLL-70ZI
CY62137VLL-70ZI Description
2-Mbit (128K x 16) Static RAM
CY62137VLL-70ZI Vendor
Cypress
CY62137VLL-70ZI Features
  • Temperature Ranges
    • Commercial: 0°C to 70°C
    • Industrial: –40°C to 85°C
    • Automotive: –40°C to 125°C
  • High speed: 55 ns and 70 ns
  • Wide voltage range: 2.7V–3.6V
  • Ultra-low active, standby power
  • Easy memory expansion with /CE and /OE features
  • TTL-compatible inputs and outputs
  • Automatic power-down when deselected
  • CMOS for optimum speed/power
  • Package Available in a standard 44-pin TSOP Type II (forward pinout) package
CY62137VLL-70ZI Description

    The CY62137V is a high-performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power-down feature that reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (/CE HIGH) or when /CE is LOW and both /BLE and /BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (/CE HIGH), outputs are disabled (/OE HIGH), /BHE and /BLE are disabled (/BHE, /BLE HIGH), or during a write operation (/CE LOW, and /WE LOW).

    Writing to the device is accomplished by taking Chip Enable (/CE) and Write Enable (/WE) inputs LOW. If Byte Low Enable (/BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (/BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16).

    Reading from the device is accomplished by taking Chip Enable (/CE) and Output Enable (/OE) LOW while forcing the Write Enable (/WE) HIGH. If Byte Low Enable (/BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (/BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes.

CY62137VLL-70ZI Datasheet and Application Notes
ParameterValue
100-999 qty $4.40
Density 2Mb
Organization 128Kb x16
Vcc (V) 3.0
Voltage Range 2.7 to 3.6
Power LL, SL
Comments For fBGA pkgs, use CY62137CV30
Products related to CY62137VLL-70ZI
CY62137VLL-70BAI   CY62137VLL-55ZI   CY62137V   CY62137VLL-70ZE   

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