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CY62147CV33LL-70BAI

CY62147CV33LL-70BAI Manufacturer

CY62147CV33LL-70BAI Description

CY62147CV33LL-70BAI Datasheet (PDF)

CY62147CV33LL-70BAI Datasheet

CY62147CV33LL-70BAI Price & Availability


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CY62147CV33LL-70BAI Features

  • High speed
    • 55 ns and 70 ns availability
  • Voltage range:
    • CY62147CV25: 2.2V?2.7V
    • CY62147CV30: 2.7V?3.3V
    • CY62147CV33: 3.0V?3.6V
  • Pin-compatible with CY62147V
  • Ultra-low active power
    • Typical active current: 1.5 mA @ f = 1 MHz
    • Typical active current: 5.5 mA @ f = fmax (70 ns speed)
  • Low standby power
  • Easy memory expansion with /CE and /OE features
  • Automatic power-down when deselected
  • CMOS for optimum speed/power

CY62147CV33LL-70BAI Description

     

    The CY62147CV25/30/33 are high-performance CMOS static RAMs organized as 256K words by 16 bits. These devices feature advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery LifeTM (MoBL®) in portable applications such as cellular telephones. The devices also have an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected (/CE HIGH or both /BLE and /BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (/CE HIGH), outputs are disabled (/OE HIGH), both Byte High Enable and Byte Low Enable are disabled (/BHE, /BLE HIGH), or during a write operation (/CE LOW and /WE LOW).

     

    Writing to the device is accomplished by taking Chip Enable (/CE) and Write Enable (/WE) inputs LOW. If Byte Low Enable (/BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A17). If Byte High Enable (/BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A17).

     

    Reading from the device is accomplished by taking Chip Enable (/CE) and Output Enable (/OE) LOW while forcing the Write Enable (/WE) HIGH. If Byte Low Enable (/BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (/BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes.

     

    The CY62147CV25/30/33 are available in a 48-ball FBGA package.

    CY62147CV33LL-70BAI Parameters

    Vcc (V)3.3
    Density4MB
    Organization256Kb x16
    Voltage Range3.0 to 3.6
    PowerLL
    Select parameters and click to see components with these parameters.

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