CY62158CV25LL-70BAI Datasheet

• High Speed
• • 55 ns and 70 ns availability
• Voltage range:
• • CY62158CV25: 2.2V?2.7V
  • CY62158CV30: 2.7V?3.3V
  • CY62158CV33: 3.0V?3.6V
• Ultra low active power
• • Typical active current: 1.5 mA @ f = 1 MHz
  • Typical active current: 5.5 mA @ f = f_max(70 ns speed)
• Low standby power
• Easy memory expansion with /CE₁, CE₂ and /OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power

The CY62158CV25/30/33 are high-performance CMOS static RAMs organized as 1024K words by 8 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life? (MoBL?) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected (/CE₁ HIGH or CE₂ LOW).

Writing to the device is accomplished by taking Chip Enable 1 (/CE₁) and Write Enable (/WE) inputs LOW and Chip Enable 2 (CE₂) HIGH. Data on the eight I/O pins (I/O₀ through I/O₇) is then written into the location specified on the address pins (A₀ through A₁₉).

Reading from the device is accomplished by taking Chip Enable 1 (/CE₁) and Output Enable (/OE) LOW and Chip Enable 2 (CE₂) HIGH while forcing Write Enable (/WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O₀ through I/O₇) are placed in a high-impedance state when the device is deselected (/CE₁ LOW and CE₂ HIGH), the outputs are disabled (/OE HIGH), or during a write operation (/CE₁ LOW and CE₂ HIGH and /WE LOW).

The CY62158CV25/30/33 are available in a 48-ball FBGA package.