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CY7C036A-20AC

CY7C036A-20AC Description

CY7C036A-20AC Manufacturer

CY7C036A-20AC Datasheet (PDF)

CY7C036A-20AC Datasheet

CY7C036A-20AC Price & Availability


Check CY7C036A-20AC Price & Availability at Canics

CY7C036A-20AC Features

  • True dual-ported memory cells which allow simultaneous access of the same memory location
  • 16K x 16 organization (CY7C026A)
  • 16K x 18 organization (CY7C036A)
  • 0.35-micron CMOS for optimum speed/power
  • High-speed access: 12[1]/15/20 ns
  • Low operating power
    • Active: ICC = 180 mA (typical)
    • Standby: ISB3 = 0.05 mA (typical)
  • Fully asynchronous operation
  • Automatic power-down
  • Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device
  • On-chip arbitration logic
  • Semaphores included to permit software handshaking between ports
  • INT flags for port-to-port communication
  • Separate upper-byte and lower-byte control
  • Pin select for Master or Slave
  • Commercial and Industrial temperature ranges
  • Available in 100-Pin TQFP
  • Pin-compatible and functionally equivalent to IDT70261

CY7C036A-20AC Parameters

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