CY7C1019-12VC
CY7C1019-12VC Description
128K x 8 Static RAM
CY7C1019-12VC Vendor
Cypress
CY7C1019-12VC Features
  • High speed
  • tAA = 10 ns
  • CMOS for optimum speed/power
  • Center power/ground pinout
  • Automatic power-down when deselected
  • Easy memory expansion with CE and OE options
CY7C1019-12VC Description

    Writing to the device is accomplished by taking chip enable (CE) and write enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).

    Reading from the device is accomplished by taking chip enable (CE) and output enable (OE) LOW while forcing write enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

    The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW).

    The CY7C1019 is available in standard 400-mil-wide SOJs.

CY7C1019-12VC Datasheet and Application Notes
ParameterValue
Density 1Mb
Organization 128Kb x8
Vcc (V) 5
Comments Use CY7C1019B
Products related to CY7C1019-12VC
CY7C1019   CY7C1019-15VC   

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