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CY7C1024AV33-10AC Datasheet

CY7C1024AV33-10AC ManufacturerCypress
CY7C1024AV33-10AC Description128K x 24 Static RAM
CY7C1024AV33-10AC Datasheet (PDF)
CY7C1024AV33-10AC Datasheet
CY7C1024AV33-10AC Features
  • High speed
    • tAA = 10 ns
  • CMOS for optimum speed/power
  • Center power/ground pinout
  • Automatic power-down when deselected
  • Easy memory expansion with /CE1, CE2, /CE3 and /OE options
CY7C1024AV33-10AC Description

     

    The CY7C1024AV33 is a high-performance CMOS static RAM organized as 131,072 words by 24 bits. Easy memory expansion is provided by an active LOW /CE1, /CE3, active HIGH CE2, an active LOW Output Enable (/OE), and three-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

    Writing to the device is accomplished by taking Chip Enable (/CE1, CE2, /CE3) active and Write Enable (/WE) inputs LOW. Data on the 24 I/O pins (I/O0 through I/O23) is then written into the location specified on the address pins (A0 through A16).

    Reading from the device is accomplished by taking Chip Enable (/CE1, CE2, /CE3) active and Output Enable (/OE) LOW while forcing Write Enable (/WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

    The 24 input/output pins (I/O0 through I/O23) are placed in a high-impedance state when the device is deselected (/CE HIGH), the outputs are disabled (/OE HIGH), or during a write operation (/CE1, /CE3 LOW, CE2 HIGH, and /WE LOW).

    The CY7C1024AV33 is available in a standard 119-ball BGA package and a 100-pin TQFP package.

    CY7C1024AV33-10AC Parameters
    Vcc (V)3.3
    Density3Mb
    Organization128Kb x24
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