CY7C1024AV33-12BGI

CY7C1024AV33-12BGI Manufacturer

CY7C1024AV33-12BGI Description

CY7C1024AV33-12BGI Datasheet (PDF)

CY7C1024AV33-12BGI Price & Availability

CY7C1024AV33-12BGI Features

• High speed
  • t_AA = 10 ns
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with /CE1, CE2, /CE3 and /OE options

CY7C1024AV33-12BGI Description

The CY7C1024AV33 is a high-performance CMOS static RAM organized as 131,072 words by 24 bits. Easy memory expansion is provided by an active LOW /CE1, /CE3, active HIGH CE2, an active LOW Output Enable (/OE), and three-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to the device is accomplished by taking Chip Enable (/CE1, CE2, /CE3) active and Write Enable (/WE) inputs LOW. Data on the 24 I/O pins (I/O₀ through I/O₂₃) is then written into the location specified on the address pins (A₀ through A₁₆).

Reading from the device is accomplished by taking Chip Enable (/CE1, CE2, /CE3) active and Output Enable (/OE) LOW while forcing Write Enable (/WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The 24 input/output pins (I/O₀ through I/O₂₃) are placed in a high-impedance state when the device is deselected (/CE HIGH), the outputs are disabled (/OE HIGH), or during a write operation (/CE1, /CE3 LOW, CE2 HIGH, and /WE LOW).

The CY7C1024AV33 is available in a standard 119-ball BGA package and a 100-pin TQFP package.

CY7C1024AV33-12BGI Parameters

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