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CY7C1046CV33-15VI Datasheet

CY7C1046CV33-15VI ManufacturerCypress
CY7C1046CV33-15VI Description1M x 4 Static RAM
CY7C1046CV33-15VI Datasheet (PDF)
CY7C1046CV33-15VI Datasheet
CY7C1046CV33-15VI Features
  • High speed
  • tAA = 10 ns
  • Low active power for 10-ns speed
  • 324 mW (max.)
  • 2.0V data retention
  • Automatic power-down when deselected
  • TTL-compatible inputs and outputs
  • Easy memory expansion with /CE and /OE features
CY7C1046CV33-15VI Description

     

    The CY7C1046CV33 is a high-performance CMOS static RAM organized as 1,048,576 words by four bits. Easy memory expansion is provided by an active LOW Chip Enable (/CE), an active LOW Output Enable (/OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (/CE) and Write Enable (/WE) inputs LOW. Data on the four I/O pins (I/O0 through I/O3) is then written into the location specified on the address pins (A0 through A19).

    Reading from the device is accomplished by taking Chip Enable (/CE) and Output Enable (/OE) LOW while forcing Write Enable (/WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

    The four input/output pins (I/O0 through I/O3) are placed in a high-impedance state when the device is deselected (/CE HIGH), the outputs are disabled (/OE HIGH), or during a Write operation (/CE LOW, and /WE LOW).

    The CY7C1046CV33 is available in a standard 400-mil-wide 32-pin SOJ package with center power and ground (revolutionary) pinout.

    CY7C1046CV33-15VI Parameters
    Vcc (V)3.3
    Density4MB
    Organization1Mb x4
    100-999 qty $12.10
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