Catalog Categories Part Numbers Manufacturers Search

CY7C1069AV33-10ZC

CY7C1069AV33-10ZC Manufacturer

CY7C1069AV33-10ZC Description

CY7C1069AV33-10ZC Datasheet (PDF)

CY7C1069AV33-10ZC Datasheet

CY7C1069AV33-10ZC Price & Availability


Check CY7C1069AV33-10ZC Price & Availability at Canics

CY7C1069AV33-10ZC Features

  • High speed
    • tAA = 8, 10, 12 ns
  • Low active power
    • 1080 mW (max.)
  • Operating voltages of 3.3 ħ 0.3V
  • 2.0V data retention
  • Automatic power-down when deselected
  • TTL-compatible inputs and outputs
  • Easy memory expansion with /CE1 and CE2 features  

CY7C1069AV33-10ZC Description

     

    The CY7C1069AV33 is a high-performance CMOS Static RAM organized as 2,097,152 words by 8 bits. Writing to the device is accomplished by enabling the chip (by taking /CE1 LOW and CE2 HIGH) and Write Enable (/WE) inputs LOW.

    Reading from the device is accomplished by enabling the chip (/CE1 LOW and CE2 HIGH) as well as forcing the Output Enable (/OE) LOW while forcing the Write Enable (/WE) HIGH. See the truth table at the back of this data sheet for a complete description of Read and Write modes.

    The input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (/CE1 HIGH or CE2 LOW), the outputs are disabled (/OE HIGH), or during a Write operation (/CE1 LOW, CE2 HIGH, and /WE LOW).

    The CY7C1069AV33 is available in a 54-pin TSOP II package with center power and ground (revolutionary) pinout, and a 48-ball fine-pitch ball grid array (FBGA) package.

    CY7C1069AV33-10ZC Parameters

    Vcc (V)3.3
    Density16Mb
    Organization2Mb x8
    100-999 qty $23.40
    Select parameters and click to see components with these parameters.

    Products Similar to CY7C1069AV33-10ZC


     

    Keywords
    CY7C1069AV33-10ZC Data Sheet CY7C1069AV33-10ZC Spec CY7C1069AV33-10ZC Application Notes CY7C1069AV33-10ZC Distributor
    CY7C1069AV33-10ZC Circuit CY7C1069AV33-10ZC Reference CY7C1069AV33-10ZC PDF CY7C1069AV33-10ZC RoHS