| CY7C1350F-200BGC Manufacturer | Cypress |
| CY7C1350F-200BGC Description | 4-Mb (128K x 36) Pipelined SRAM with Nobl(TM) Architecture |
| CY7C1350F-200BGC Datasheet (PDF) | |
| CY7C1350F-200BGC Features | - Pin compatible and functionally equivalent to ZBT? devices
- Internally self-timed output buffer control to eliminate the need to use OE
- Byte Write capability
- 128K x 36 common I/O architecture
- Single 3.3V power supply
- 2.5V/3.3V I/O Operation
- Fast clock-to-output times
- 2.6 ns (for 250-MHz device)
- 2.6 ns (for 225-MHz device)
- 2.8 ns (for 200-MHz device)
- 3.5 ns (for 166-MHz device)
- 4.0 ns (for 133-MHz device)
- 4.5 ns (for 100-MHz device)
- Clock Enable (CEN) pin to suspend operation
- Synchronous self-timed writes
- Asynchronous output enable (OE)
- JEDEC-standard 100 TQFP and 119 BGA packages
- Burst Capability?linear or interleaved burst order
- ?ZZ? Sleep mode option
|
| CY7C1350F-200BGC Parameters | | Vcc (V) | 3.3 | | Architecture | Pipeline | | Density | 4MB | | Organization | 128Kb x36 | | 100-999 qty | $10.00 | | Comments | Production | | Vccq (V) | 2.5,3.3 |
|
| Related or Similar Components | CY7C1350F CY7C1350F-100AC CY7C1350F-133AC CY7C1350F-133AI CY7C1350F-200AC |