- 3.3V high-speed, low-power, bidirectional, First-In First-Out (FIFO) memories w/ bus matching capabilities
- 1K × 36 × 2 (CY7C43644AV)
- 4K × 36 × 2 (CY7C43664AV)
- 16K × 36 × 2 (CY7C43684AV)
- 0.25-micron CMOS for optimum speed/power
- High-speed 133-MHz operation (7.5-ns Read/Write cycle times)
- Low power
- Fully asynchronous and simultaneous Read and Write operation permitted
- Mailbox bypass register for each FIFO
- Parallel and Serial Programmable Almost Full and Almost Empty flags
- Retransmit function
- Standard or FWFT user selectable mode
- Partial Reset
- Big or Little Endian format for word or byte bus sizes
- 128-pin TQFP packaging
- Easily expandable in width and depth
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