CY7C43664 Datasheet

High-speed, low-power, bidirectional, First-In, First-Out (FIFO) memories with bus matching capabilities
1K x36 x2 (CY7C43644)
4K x36 x2 (CY7C43664)
16K x36 x2 (CY7C43684)
0.35-micron CMOS for optimum speed/power
High-speed 133-MHz operation (7.5 ns read/writecycle times)
Low power
- I_CC = 100 mA
- I_SB = 10 mA
Fully asynchronous and simultaneous read and write operation permitted
Mailbox bypass register for each FIFO
Parallel and Serial Programmable Almost-Full and Almost-Empty flags
Retransmit function
Standard or FWFT mode user selectable
Partial Reset
Big or Little Endian format for word or byte bus sizes
128-pin TQFP packaging
Easily expandable in width and depth

CY7C43664