CY7C43666 Datasheet

High-speed, low-power, first-in first-out (FIFO) memories w/ three independent ports (one bidirectional x36, and two unidirectional x18)
1K x36/x18x2 (CY7C43646)
4K x36/x18x2 (CY7C43666)
16K x36/x18x2 (CY7C43686)
0.35-micron CMOS for optimum speed/power
High speed 133-MHz operation (7.5-ns read/write cycle times)
Low power
- I_CC= 100 mA
- I_SB= 10 mA
Fully asynchronous and simultaneous read and write operation permitted
Mailbox bypass register for each FIFO
Parallel and Serial Programmable Almost Full and Almost Empty flags
Retransmit function
Standard or FWFT mode user selectable
Partial Reset
Big or Little Endian format for word or byte bus sizes
128-pin TQFP packaging
Easily expandable in width and depth

CY7C43666