CYD09S72V-133BBI

CYD09S72V-133BBI Manufacturer

CYD09S72V-133BBI Description

CYD09S72V-133BBI Description

CYD09S72V-133BBI Datasheet (PDF)

CYD09S72V-133BBI Price & Availability

CYD09S72V-133BBI Features

• FLEx72 (CYD18S72V)
• True dual-ported memory allows both ports to simulta­neously read from the same memory location
• Synchronous pipelined
• 18-Mb device organized as 256K × 72
• High-bandwidth up to 19.2 Gbps
  • 133 MHz * 72 bits wide * 2 ports
• Pipelined output mode allows 133-MHz operation
• High-speed clock to data access: 4.7 ns (max.)
• Low operating power at 3.3V VDD
  • Active = 410 mA (typ.)
• Interrupt flags for port to port messaging
• Global master reset
• Separate byte enables on both ports
• Commercial and industrial temperature ranges
• IEEE 1149.1-compatible JTAG boundary scan
• 484-ball FBGA (1-mm pitch) (23 mm × 23 mm)

CYD09S72V-133BBI Parameters

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