CYD18S72V-100BBI Manufacturer
CYD18S72V-100BBI DescriptionCYD18S72V-100BBI Description
CYD18S72V-100BBI Datasheet (PDF)
CYD18S72V-100BBI Price & Availability
CYD18S72V-100BBI Features- FLEx72 (CYD18S72V)
- True dual-ported memory allows both ports to simultaneously read from the same memory location
- Synchronous pipelined
- 18-Mb device organized as 256K × 72
- High-bandwidth up to 19.2 Gbps
- 133 MHz * 72 bits wide * 2 ports
- Pipelined output mode allows 133-MHz operation
- High-speed clock to data access: 4.7 ns (max.)
- Low operating power at 3.3V VDD
- Interrupt flags for port to port messaging
- Global master reset
- Separate byte enables on both ports
- Commercial and industrial temperature ranges
- IEEE 1149.1-compatible JTAG boundary scan
- 484-ball FBGA (1-mm pitch) (23 mm × 23 mm)
CYD18S72V-100BBI Parameters
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