The CYM1841B is a high-performance 8-megabit static RAM module organized as 256K words by 32 bits. This module is constructed from two 256K x 16 SRAMs in SOJ packages mounted on an epoxy laminate board with pins. Four chip selects (/CS1, /CS2, /CS3, /CS4) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. Writing to each byte is accomplished when the appropriate Chip Select (/CS) and Write Enable (/WE) inputs are both LOW. Data on the Input/Output pins (I/O) is written into the memory location specified on the address pins (A0 through A17). Reading the device is accomplished by taking the Chip Select (/CS) LOW while Write Enable (/WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the data Input/Output pins (I/O). The data input/output pins stay at the high-impedance state when write enable is LOW or the appropriate chip selects are HIGH. Two pins (PD0 and PD1) are used to identify module memory density in applications where alternate versions of the JEDEC-standard modules can be interchanged. A 72-pin SIMM is offered for compatibility with the 1M x 32 CYM1851. This version is socket upgradable to the CYM1851. Both the 64-pin and 72-pin SIMM modules are available with either tin-lead or 10 micro-inches of gold flash on the edge contacts.
|