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100331SC

100331SC Description

Low Power Triple D-Type Flip-Flop

100331SC Description

IC FLIP FLOP LP TRPL D 24-SOIC

100331SC Categories

Flip- Flop

100331SC Manufacturer

Fairchild Semiconductor

100331SC Datasheet (PDF)

100331SC Datasheet

100331SC Price & Availability


Check 100331SC Price & Availability at Canics

100331SC Features

  • 35% power reduction of the 100131
  • 2000V ESD protection
  • Pin/function compatible with 100131
  • Voltage compensated operating range = -4.2V to -5.7V
  • Available to industrial grade temperature range

100331SC Description

    The 100331 contains three D-type, edge-triggered master/slave flip-flops with true and complement outputs, a Common Clock (CPC), and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct Set (SDn) and Direct Clear (CDn) inputs. Data enters a master when both CPn and CPC are LOW and transfers to a slave when CPn or CPC (or both) go HIGH. The Master Set, Master Reset and individual CDn and SDn inputs override the Clock inputs. All inputs have 50 kohm pull-down resistors.

    100331SC Parameters

    Product statusNot recommended for new designs
    Package typeDIP
    Package typeSOIC
    Leads24
    Packing methodRAIL
    TypeD-Type Bus
    Output TypeDifferential
    FunctionMaster Reset
    CategoryIntegrated Circuits (ICs)
    FamilyLogic Family - Flip Flops
    Operating Temperature-40°C ~ 85°C
    Number of Elements3
    Mounting TypeSurface Mount
    Package / Case24-SOIC (7.5mm Width)
    Voltage - Supply4.2 V ~ 5.7 V
    Number of Bits per Element1
    Frequency - Clock400MHz
    Delay Time - Propagation1ns
    Trigger TypePositive Edge
    Select parameters and click to see components with these parameters.

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    100331, 100331PC, 100331QC, 100331QCX, 100331QI

     
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    Keywords
    100331SC Data Sheet 100331SC Spec 100331SC Application Notes 100331SC Distributor
    100331SC Circuit 100331SC Reference 100331SC PDF 100331SC RoHS