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100331SCX

100331SCX Description

100331SCX Description

100331SCX Categories

100331SCX Manufacturer

100331SCX Datasheet (PDF)

100331SCX Datasheet

100331SCX Price & Availability


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100331SCX Features

  • 35% power reduction of the 100131
  • 2000V ESD protection
  • Pin/function compatible with 100131
  • Voltage compensated operating range = -4.2V to -5.7V
  • Available to industrial grade temperature range

100331SCX Description

    The 100331 contains three D-type, edge-triggered master/slave flip-flops with true and complement outputs, a Common Clock (CPC), and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct Set (SDn) and Direct Clear (CDn) inputs. Data enters a master when both CPn and CPC are LOW and transfers to a slave when CPn or CPC (or both) go HIGH. The Master Set, Master Reset and individual CDn and SDn inputs override the Clock inputs. All inputs have 50 kohm pull-down resistors.

    100331SCX Parameters

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    Keywords
    100331SCX Data Sheet 100331SCX Spec 100331SCX Application Notes 100331SCX Distributor
    100331SCX Circuit 100331SCX Reference 100331SCX PDF 100331SCX RoHS