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100336QC

100336QC Description

100336QC Description

100336QC Categories

100336QC Manufacturer

100336QC Datasheet (PDF)

100336QC Datasheet

100336QC Price & Availability


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100336QC Features

  • 40% power reduction of the 100136
  • 2000V ESD protection
  • Pin/function compatible with 100136
  • Voltage compensated operating range = -4.2V to -5.7V
  • Available to industrial grade temperature range

100336QC Description

    The 100336 operates as either a modulo-16 up/down counter or as a 4-bit bidirectional shift register. Three Select (Sn) inputs determine the mode of operation, as shown in the Function Select table. Two Count Enable (CEP#, CET#) inputs are provided for ease of cascading in multistage counters. One Count Enable (CET#) input also doubles as a Serial Data (D0) input for shift-up operation. For shift-down operation, D3 is the Serial Data input. In counting operations the Terminal Count (TC#) output goes LOW when the counter reaches 15 in the count/up mode or 0 (zero) in the count/down mode. In the shift modes, the TC# output repeats the Q3 output. The dual nature of this TC#/Q3 output and the D0/CET# input means that one interconnection from one stage to the next higher stage serves as the link for multistage counting or shift-up operation. The individual Preset (Pn) inputs are used to enter data in parallel or to preset the counter in programmable counter applications. A HIGH signal on the Master Reset (MR) input overrides all other inputs and asynchronously clears the flip-flops. In addition, a synchronous clear is provided, as well as a complement function which synchronously inverts the contents of the flip-flops. All inputs have 50 kohm pull-down resistors.

    100336QC Parameters

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    Keywords
    100336QC Data Sheet 100336QC Spec 100336QC Application Notes 100336QC Distributor
    100336QC Circuit 100336QC Reference 100336QC PDF 100336QC RoHS