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74ALVC162373T

74ALVC162373T Description

74ALVC162373T Description

74ALVC162373T Categories

74ALVC162373T Manufacturer

74ALVC162373T Datasheet (PDF)

74ALVC162373T Datasheet

74ALVC162373T Price & Availability


Check 74ALVC162373T Price & Availability at Canics

74ALVC162373T Features

  • 1.65V to 3.6V VCC supply operation
  • 3.6V tolerant inputs and outputs
  • 26ohm series resistors in outputs
  • tPD (In to On) 3.8 ns max for 3.0V to 3.6V VCC 5.0 ns max for 2.3V to 2.7V VCC 9.0 ns max for 1.65V to 1.95V VCC
  • Power-off high impedance inputs and outputs
  • Support live insertion and withdrawal (Note 1)
  • Uses patented noise/EMI reduction circuitry
  • Latchup conforms to JEDEC JED78
  • ESD performance: Human body model > 2000V Machine model > 200V

74ALVC162373T Description

    The ALVC162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the outputs are in a high impedance state.

    74ALVC162373T Parameters

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    Keywords
    74ALVC162373T Data Sheet 74ALVC162373T Spec 74ALVC162373T Application Notes 74ALVC162373T Distributor
    74ALVC162373T Circuit 74ALVC162373T Reference 74ALVC162373T PDF 74ALVC162373T RoHS