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74ALVCH162373TX

74ALVCH162373TX Description

74ALVCH162373TX Description

74ALVCH162373TX Categories

74ALVCH162373TX Manufacturer

74ALVCH162373TX Datasheet (PDF)

74ALVCH162373TX Datasheet

74ALVCH162373TX Price & Availability


Check 74ALVCH162373TX Price & Availability at Canics

74ALVCH162373TX Features

  • 1.65V to 3.6V VCC supply operation
  • 3.6V tolerant control inputs and outputs
  • Bushold on data inputs eliminates the need for external pull-up/pull-down resistors
  • 26ohm series resistors in outputs
  • tPD (In to On) 3.8 ns max for 3.0V to 3.6V VCC 5.0 ns max for 2.3V to 2.7V VCC 9.0 ns max for 1.65V to 1.95V VCC
  • Uses patented noise/EMI reduction circuitry
  • Latchup conforms to JEDEC JED78
  • ESD performance: Human body model > 2000V Machine model > 200V

74ALVCH162373TX Description

    The ALVCH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the outputs are in a high impedance state.

    74ALVCH162373TX Parameters

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    Keywords
    74ALVCH162373TX Data Sheet 74ALVCH162373TX Spec 74ALVCH162373TX Application Notes 74ALVCH162373TX Distributor
    74ALVCH162373TX Circuit 74ALVCH162373TX Reference 74ALVCH162373TX PDF 74ALVCH162373TX RoHS