74ALVCH16373T Description74ALVCH16373T Description74ALVCH16373T Categories74ALVCH16373T Manufacturer
74ALVCH16373T Datasheet (PDF)
74ALVCH16373T Price & Availability
74ALVCH16373T Features- 1.65V to 3.6V VCC supply operation
- 3.6V tolerant control inputs and outputs
- Bushold on data inputs eliminates the need for external pull-up/pull-down resistors
- tPD (In to On) 3.6 ns max for 3.0V to 3.6V VCC 4.5 ns max for 2.3V to 2.7V VCC 6.8 ns max for 1.65V to 1.95V VCC
- Uses patented noise/EMI reduction circuitry
- Latch-up conforms to JEDEC JED78
- ESD performance: Human body model > 2000V Machine model > 200V
74ALVCH16373T DescriptionThe ALVCH16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the outputs are in a high impedance state. 74ALVCH16373T Parameters
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