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CD4094BCWM

CD4094BCWM Description

CD4094BCWM Categories

CD4094BCWM Manufacturer

CD4094BCWM Datasheet (PDF)

CD4094BCWM Datasheet

CD4094BCWM Price & Availability


Check CD4094BCWM Price & Availability at Canics

CD4094BCWM Features

  • Wide supply voltage range: 3.0V to 18V
  • High noise immunity: 0.45 VDD (typ.)
  • Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS
  • 3-STATE outputs

CD4094BCWM Description

    The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of the last stage (QS) can be used to cascade several devices. Data on the QS output is transferred to a second output, Q'S, on the following negative clock edge.

    CD4094BCWM Parameters

    Product statusNot recommended for new designs
    Package typeDIP
    Package typeSOIC
    Leads16
    Packing methodRAIL
    Select parameters and click to see components with these parameters.

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    Keywords
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    CD4094BCWM Circuit CD4094BCWM Reference CD4094BCWM PDF CD4094BCWM RoHS