| MM74C175 Description |
| Quad D-Type Flip-Flop |
| MM74C175 Vendor |
| Fairchild Semiconductor |
| MM74C175 Categories |
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| MM74C175 Features |
- Wide supply voltage range: 3V to 15V
- Guaranteed noise margin: 1.0V
- High noise immunity: 0.45 VCC (typ.)
- Low power TTL compatibility: Fan out of 2 driving 74L
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| MM74C175 Description |
The MM74C175 consists of four positive-edge triggered D-type flip-flops implemented with monolithic CMOS technology. Both are true and complemented outputs from each flip-flop are externally available. All four flip-flops are controlled by a common clock and a common clear. Information at the D-type inputs meeting the set-up time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. The clearing operation, enabled by a negative pulse at Clear input, clears all four Q outputs to logical "0" and Q's to logical "1". |
| MM74C175 Datasheet and Application Notes |
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| Parameter | Value |
| Product status | Not recommended for new designs |
| Package type | DIP |
| Leads | 16 |
| Packing method | RAIL |
| Products related to MM74C175 |
| MM74C175N |