| MM74C73 Description |
| Dual J-K Flip-Flops with Clear and Preset |
| MM74C73 Vendor |
| Fairchild Semiconductor |
| MM74C73 Categories |
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| MM74C73 Features |
- Supply voltage range: 3V to 15V
- Tenth power TTL compatible: Drive 2 LPTTL loads
- High noise immunity: 0.45 VCC (typ.)
- Low power: 50 nW (typ.)
- Medium speed operation: 10 MHz (typ.)
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| MM74C73 Description |
The MM74C73 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear or preset is independent of the clock and is accomplished by a low level on the respective input. |
| MM74C73 Datasheet and Application Notes |
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| Parameter | Value |
| Product status | Not recommended for new designs |
| Package type | DIP |
| Leads | 14 |
| Packing method | RAIL |
| Products related to MM74C73 |
| MM74C73N |