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CSPU877ABV

CSPU877ABV Description

1.8V Phase Locked Loop Differential 1:10 SDRAM Clock Driver

CSPU877ABV Categories

Clock Drivers
PLL ICs

CSPU877ABV Manufacturer

IDT

CSPU877ABV Datasheet (PDF)

CSPU877A Datasheet

CSPU877ABV Price & Availability


Check CSPU877ABV Price & Availability at Canics

CSPU877ABV Parameters

StatusACTIVE
PackageCABGA 52
TypeProgrammable Skew PLL
Input TypeDifferential
Output TypeDifferential
TemperatureC
SpeedSee Data Sheet
Voltage1.8 V
Input Interface1.8V SSTL
Output Interface1.8V SSTL
Clock Inputs1
Clock Outputs10
Input Frequency125-250
Output Frequency125-250
Input Duty Cycle40-60
Jitter peak-to-peak0.08
Max Prop Delay0.1
Output Skew0.12
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Keywords
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CSPU877ABV Circuit CSPU877ABV Reference CSPU877ABV PDF CSPU877ABV RoHS