CD4023BMS Manufacturer
CD4023BMS DescriptionCD4023BMS DescriptionCD4023BMS Categories
CD4023BMS Datasheet (PDF)
CD4023BMS Price & Availability
CD4023BMS Features- High-Voltage Types (20V Rating)
- Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V
- Buffered Inputs and Outputs
- Standardized Symmetrical Output Characteristics
- Maximum Input Current of 1?A at 18V Over Full Package- Temperature Range; 100nA at 18V and +25oC
- 100% Tested for Maximum Quiescent Current at 20V
- 5V, 10V and 15V Parametric Ratings
- Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
- Meets All Requirements of JEDEC Tentative Standards No. 13B, ?Standard Specifications for Description of ?B? Series CMOS Device?s
CD4023BMS Features
-
High-Voltage Types (20V Rating)
-
Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V
-
Buffered Inputs and Outputs
-
Standardized Symmetrical Output Characteristics
-
Maximum Input Current of 1ľA at 18V Over Full Package- Temperature Range; 100nA at 18V and +25oC
-
100% Tested for Maximum Quiescent Current at 20V
-
5V, 10V and 15V Parametric Ratings
-
Noise Margin (Over Full Package Temperature Range):
-
1V at VDD = 5V
-
2V at VDD = 10V
-
2.5V at VDD = 15V
-
Meets All Requirements of JEDEC Tentative Standards No. 13B, "Standard Specifications for Description of "B" Series CMOS Device's
CD4023BMS Description
CD4011BMS - Quad 2 Input
CD4012BMS - Dual 4 Input
CD4023BMS - Triple 3 Input
CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
The CD4011BMS, CD4012BMS and the CD4023BMS is supplied in these 14 lead outline packages:
Keywords
| CD4023BMS Data Sheet |
CD4023BMS Spec |
CD4023BMS Application Notes |
CD4023BMS Distributor |
| CD4023BMS Circuit |
CD4023BMS Reference |
CD4023BMS PDF |
CD4023BMS RoHS |
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