| CD4027BMS Description | | J-K Flop Flop, Master-Slave, Dual, Rad-Hard, CMOS, Logic | | CD4027BMS Vendor | | Intersil | | CD4027BMS Categories | | | CD4027BMS Features | - High Voltage Type (20V Rating)
- Set - Reset Capability
- Static Flip-Flop Operation - Retains State Indefinitely with Clock Level Either �High� or �Low�
- Medium Speed Operation - 16MHz (typ.) Clock Toggle Rate at 10V
- Standardized Symmetrical Output Characteristics
- 100% Tested For Quiescent Current at 20V
- Maximum Input Current of 1�A at 18V Over Full Package-Temperature Range;
- Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
- 5V, 10V and 15V Parametric Ratings
- Meets All Requirements of JEDEC Tentative Standard No. 13B, �Standard Specifications for Description of �B� Series CMOS Devices�
| | CD4027BMS Applications | - Registers, Counters, Control Circuits
| | CD4027BMS Datasheet and Application Notes | |
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