CD4070BMS

CD4070BMS Manufacturer

CD4070BMS Description

CD4070BMS Description

CD4070BMS Categories

CD4070BMS Datasheet (PDF)

CD4070BMS Price & Availability

CD4070BMS Features

• High Voltage Types (20V Rating)
• CD4070BMS - Quad Exclusive OR Gate
• CD4077BMS - Quad Exclusive NOR Gate
• Medium Speed Operation
  • tPHL, tPLH = 65ns (Typ.) at VDD = 10V, CL = 50pF
• 5V, 10V and 15V Parametric Ratings
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1?A at 18V Over Full Package Temperature Range; 100nA at 18V and +25^oC
• Noise Margin (Over Full Package/Temperature Range)
  • 1V at VDD = 5V
  • 2V at VDD = 10V
  • 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard No. 13B, ?Standard Specifications for Description of ?B? Series CMOS Devices?

CD4070BMS Features

• High Voltage Types (20V Rating)
• CD4070BMS - Quad Exclusive OR Gate
• CD4077BMS - Quad Exclusive NOR Gate
• Medium Speed Operation
  • tPHL, tPLH = 65ns (Typ.) at VDD = 10V, CL = 50pF
• 5V, 10V and 15V Parametric Ratings
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1ľA at 18V Over Full Package Temperature Range; 100nA at 18V and +25^oC
• Noise Margin (Over Full Package/Temperature Range)
  • 1V at VDD = 5V
  • 2V at VDD = 10V
  • 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

CD4070BMS Description

CD4070BMS contains four independent Exclusive OR gates. The CD4077BMS contains four independent Exclusive NOR gates.

The CD4070BMS and CD4077BMS provide the system designer with a means for direct implementation of the Exclusive OR and Exclusive NOR functions, respectively.

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