CDP68HC68P1 Manufacturer
CDP68HC68P1 DescriptionCDP68HC68P1 Categories
CDP68HC68P1 Datasheet (PDF)
CDP68HC68P1 Price & Availability
CDP68HC68P1 Features- Fully Static Operation
- Operating Voltage Range 3-6V
- Compatible with Intersil/Motorola SPI Bus
- 2 External Address Pins Tied to VDD or VSS to Allow Up to 4 Devices to Share the Same Chip Enable
- Versatile Bit-Set and Bit-Clear Capability
- Accepts Either SCK Clock Polarity - SCK Voltage Level is Latched When Chip Enable Goes Active
- All Inputs are Schmitt-Trigger
- 8-Bit I/O Port - Each Bit can be Individually Programmed as an Input or Output Via an 8-Bit Data Direction Register
- Programmable On Board Comparator
- Simultaneous Transfer of Compare Information to CPU During Read or Write - Separate Access Not Required
Keywords
| CDP68HC68P1 Data Sheet |
CDP68HC68P1 Spec |
CDP68HC68P1 Application Notes |
CDP68HC68P1 Distributor |
| CDP68HC68P1 Circuit |
CDP68HC68P1 Reference |
CDP68HC68P1 PDF |
CDP68HC68P1 RoHS |
|