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DG411/883

DG411/883 Manufacturer

DG411/883 Description

DG411/883 Description

DG411/883 Categories

DG411/883 Datasheet (PDF)

DG411/883 Datasheet
Monolithic Quad SPST CMOS Analog Switches

DG411/883 Price & Availability


Check DG411/883 Price & Availability at Canics

DG411/883 Features

  • This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
  • ON-Resistance <35? Max
  • Low Power Consumption (PD <35?W)
  • Fast Switching Action
    • tON <175ns
    • tOFF <145ns
  • Low Charge Injection
  • Upgrade from DG211/DG212
  • TTL, CMOS Compatible
  • Single or Split Supply Operation

DG411/883 Features

  • This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
  • ON-Resistance <35W Max
  • Low Power Consumption (PD <35mW)
  • Fast Switching Action
    • tON <175ns
    • tOFF <145ns
  • Low Charge Injection
  • Upgrade from DG211/DG212
  • TTL, CMOS Compatible
  • Single or Split Supply Operation

DG411/883 Description

The DG411/883 series monolithic CMOS analog switches are drop-in replacements for the popular DG211 and DG212 series devices. They include four independent single pole throw (SPST) analog switches, and TTL and CMOS compatible digital inputs.

These switches feature lower analog ON-resistance (<35Ω) and faster switch time (tON <175ns) compared to the DG211 or DG212. Charge injection has been reduced, simplifying sample and hold applications.

The improvements in the DG411/883 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling 40VP-P signals. Power supplies may be single-ended from +5V to +34V, or split from ±5V to ±20V.

The four switches are bilateral, equally matched for AC or bidirectional signals. The ON-resistance variation with analog signals is quite low over a ±15V analog input range. This permits independent control of turn-on and turn-off times for SPDT configurations, permitting "break-before-make" or "make-before-break" operation with a minimum of external logic.


 

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