HI5762

HI5762 Manufacturer

HI5762 Description

HI5762 Description

HI5762 Categories

HI5762 Datasheet (PDF)

HI5762 Price & Availability

HI5762 Features

• Sampling Rate 60MSPS
• 8.8 Bits at ^oC = 10MHz
• Low Power at 60MSPS 650mW
• Wide Full Power Input Bandwidth 250MHz
• Excellent Channel-to-Channel Isolation . >75dB
• On-Chip Sample and Hold Amplifiers
• Internal Band-Gap Voltage Reference 2.5V
• Fully Differential or Single-Ended Analog Inputs
• Single Supply Voltage Operation +5V
• TTL/CMOS Compatible Sampling Clock Input
• CMOS Compatible Digital Outputs 3.0/5.0V
• Offset Binary Digital Data Output Format
• Dual 10-Bit A/D Converters on a Monolithic Chip

HI5762 Features

• Sampling Rate: 60MSPS
• 8.8 Bits at f_IN = 10MHz
• Low Power at 60MSPS: 650mW
• Wide Full Power Input Bandwidth: 250MHz
• Excellent Channel-to-Channel Isolation: >75dB
• On-Chip Sample and Hold Amplifiers
• Internal Band-Gap Voltage Reference: 2.5V
• Fully Differential or Single-Ended Analog Inputs
• Single Supply Voltage Operation: +5V
• TTL/CMOS Compatible Sampling Clock Input
• CMOS Compatible Digital Outputs: 3.0V/5.0V
• Offset Binary Digital Data Output Format
• Dual 10-Bit A/D Converters on a Monolithic Chip

HI5762 Description

The HI5762 is a monolithic, dual 10-bit, 60MSPS analog-to-digital converter fabricated in an advanced CMOS process. It is designed for high speed applications where integration, bandwidth and accuracy are essential. Built by combining two cores of the HI5767 single channel 10-bit 60MSPS analog-to-digital converter, the HI5762 reaches a new level of multi-channel integration. The fully pipeline architecture and an innovative input stage enable the HI5762 to accept a variety of input configurations, singleended or fully differential. Only one external clock is necessary to drive both converters and an internal band-gap voltage reference is provided. This allows the system designer to realize an increased level of system integration resulting in decreased cost and power dissipation.

The HI5762 has excellent dynamic performance while consuming only 650mW of power at 60MSPS. The A/D only requires a single +5V power supply and encode clock. Data output latches are provided which present valid data to the output bus with a latency of 6 clock cycles.

For those customers needing dual channel 8-bit resolution, please refer to the HI5662. For single channel 10-bit applications, please refer to the HI5767.

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