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DS1004 Features- All-silicon timing delay circuit
- 5 delayed clock phases per input
- Input to Tap 1 delay set at 5ns
- Taps 2-5 delay range: 2, 3, 4, or 5ns
- Nominal delay tolerances of ±1.5ns
- Same accuracy for leading and trailing edges
- Low-power CMOS with TTL compatibility
- Vapor phase, IR, and wave solderable
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