DS3141

DS3141 Description

DS3141 Categories

DS3141 Manufacturer

DS3141 Datasheet (PDF)

DS3141 Price & Availability

DS3141 Features

• One/two/three/four independent DS3/E3 framers on a single die
• Framing and formatting to M23 DS3, C-bit parity DS3, and G.751 E3
• LIU interface can be binary (NRZ) or dual-rail (POS/NEG)
• B3ZS/HDB3 encoder and decoder
• Generate and detect DS3/E3 alarms
• Integrated HDLC controller for each channel
• Integrated FEAC controller for each channel
• Integrated bit error-rate tester (BERT) for each channel
• Large performance-monitoring counters
• Line, diagnostic, and payload loopbacks
• Externally controlled transmit overhead insertion port
• Support external timing or loop-timing
• Framers can be powered down when not used
• 8-bit processor port supports muxed or nonmuxed bus operation (Intel or Motorola)
• 3.3V supply with 5V tolerant I/O
• 144-pin 13mm x 13mm CSBGA package
• IEEE 1149.1 JTAG support
• Features continued on page 6 of the PDF data sheet

DS3141 Parameters

Products Similar to DS3141