| 56F8323 Features | - On-chip memory includes high-speed volatile and nonvolatile components:
- 32KB of Program Flash
- 4 KB of Program RAM
- 8 KB of Data Flash
- 8 KB of Data RAM
- 8 KB of Boot Flash
- Up to 60 MIPS at 60 MHz execution frequency
- DSP and MCU functionality in a unified, C-efficient architecture
- JTAG/EOnCE for unobtrusive, real-time debugging
- Four 36-bit accumulators
- 16- and 32-bit bidirectional barrel shifter
- Parallel instruction set with unique addressing modes
- Hardware DO and REP loops available
- Three internal address buses
- Four internal data buses
- Architectural support for 8-, 16- and 32-bit single-cycle data fetches
- MCU-style software stack support
- Controller-style addressing modes and instructions
- Single-cycle 16 x 16-bit parallel multiplier-accumulator (MAC)
- Proven to deliver more control functionality with a smaller memory footprint than competing architectures
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