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54F109

54F109 Description

54F109 Categories

54F109 Manufacturer

54F109 Datasheet (PDF)

54F109 Datasheet
54F109 Datasheet

54F109 Price & Availability


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54F109 Features

  • Guaranteed 4000V minimum ESD protection.

54F109 Description

    The 'F109 consists of two high-speed, completely independent transition clocked JK# flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK# design allows operation as a D flip-flop (refer to 'F74 data sheet) by connecting the J and K# inputs.

    Asynchronous Inputs:

    LOW input to S#D sets Q to HIGH level

    LOW input to C#D sets Q to LOW level

    Clear and Set are independent of clock

    Simultaneous LOW on C#D and S#D makes both Q and Q#

    HIGH

    54F109 Parameters

    Temperature Min (deg C)-55
    Temperature Max (deg C)125
    Select parameters and click to see components with these parameters.

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    Keywords
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