54F280
54F280 Description
9-Bit Parity Generator/Checker
54F280 Vendor
National Semiconductor
54F280 Categories
54F280 Features
  • Guaranteed 4000V minimum ESD protection
54F280 Description

    The 'F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output.

54F280 Datasheet and Application Notes
ParameterValue
Temperature Min (deg C)-55
Temperature Max (deg C)125
Products related to 54F280
54F280FMQB   54F280DMQB   54F280J-MLS   JM38510/34901BDA   
54F280LMQB   JM38510/34901BCA   JM38510/34901B2A   

ChipCatalog.com - Your Source of Information About Electronic Components