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5962-8775601SA(54AC273FMQB)

5962-8775601SA(54AC273FMQB) Description

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5962-8775601SA(54AC273FMQB) Manufacturer

5962-8775601SA(54AC273FMQB) Datasheet (PDF)

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5962-8775601SA(54AC273FMQB) Features

  • Ideal buffer for microprocessor or memory
  • Eight edge-triggered D flip-flops
  • Buffered common clock
  • Buffered, asynchronous master reset
  • See '377 for clock enable version
  • See '373 for transparent latch version
  • See '374 for TRI-STATE version
  • Outputs source/sink 24 mA
  • 'ACT has TTL-compatible inputs
  • Standard Military Drawing (SMD) -'AC273: 5962-87756

5962-8775601SA(54AC273FMQB) Description

    The '273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR#) input load and reset (clear) all flip-flops simultaneously.

    The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output.

    All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR# input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.

    5962-8775601SA(54AC273FMQB) Parameters

    StatusFull production
    PackageCERPACK
    Temperature Min (deg C)-55
    Temperature Max (deg C)125
    Pins20
    Pricing$9.60
    Select parameters and click to see components with these parameters.

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    Keywords
    5962-8775601SA(54AC273FMQB) Data Sheet 5962-8775601SA(54AC273FMQB) Spec 5962-8775601SA(54AC273FMQB) Application Notes 5962-8775601SA(54AC273FMQB) Distributor
    5962-8775601SA(54AC273FMQB) Circuit 5962-8775601SA(54AC273FMQB) Reference 5962-8775601SA(54AC273FMQB) PDF 5962-8775601SA(54AC273FMQB) RoHS