5962R8853401VEA(54ACT109JRQMLV)
5962R8853401VEA(54ACT109JRQMLV) Description
Dual JK Positive Edge-Triggered Flip-Flop
5962R8853401VEA(54ACT109JRQMLV) Vendor
National Semiconductor
5962R8853401VEA(54ACT109JRQMLV) Features
  • ICC reduced by 50%
  • Outputs source/sink 24 mA
  • 'ACT109 has TTL-compatible inputs
  • Standard Military Drawing (SMD) -'AC109: 5962-89551 -'ACT109: 5962-88534
5962R8853401VEA(54ACT109JRQMLV) Description

    The 'AC/'ACT109 consists of two high-speed completely independent transition clocked JK# flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK# design allows operation as a D flip-flop (refer to 'AC/'ACT74 data sheet) by connecting the J and K# inputs together.

    Asynchronous Inputs:

    LOW input to S#D (Set) sets Q to HIGH level

    LOW input to C#D (Clear) sets Q to LOW level

    Clear and Set are independent of clock

    Simultaneous LOW on C#D and S#D makes both Q and Q#

    HIGH

5962R8853401VEA(54ACT109JRQMLV) Datasheet and Application Notes
ParameterValue
Temperature Min (deg C)-55
Temperature Max (deg C)125
PackageCERDIP
Pins16
StatusFull production
Pricing$138.00
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