ADC10061CIWM

ADC10061CIWM Manufacturer

ADC10061CIWM Description

ADC10061CIWM Datasheet (PDF)

ADC10061CIWM Price & Availability

ADC10061CIWM Features

• Built-in sample-and-hold
• Single +5V supply
• 1, 2, or 4-input multiplexer options
• No external clock required
• Speed adjust pin for faster conversions (ADC10062 and ADC10064). See ADC10662/4 for high speed guaranteed performance.

ADC10061CIWM Description

Using an innovative, patented multistep* conversion technique, the 10-bit ADC10061, ADC10062, and ADC10064 CMOS analog-to-digital converters offer sub-microsecond conversion times yet dissipate a maximum of only 235 mW. The ADC10061, ADC10062, and ADC10064 perform a 10-bit conversion in two lower-resolution "flashes", thus yielding a fast A/D without the cost, power dissipation, and other problems associated with true flash approaches. The ADC10061 is pin-compatible with the ADC1061 but much faster, thus providing a convenient upgrade path for the ADC1061.

The analog input voltage to the ADC10061, ADC10062, and ADC10064 is sampled and held by an internal sampling circuit. Input signals at frequencies from dc to over 200 kHz can therefore be digitized accurately without the need for an external sample-and-hold circuit.

The ADC10062 and ADC10064 include a "speed-up" pin. Connecting an external resistor between this pin and ground reduces the typical conversion time to as little as 350 ns with only a small increase in linearity error.

For ease of interface to microprocessors, the ADC10061, ADC10062, and ADC10064 have been designed to appear as a memory location or I/O port without the need for external interface logic.

*U.S. Patent Number 4918449

ADC10061CIWM Parameters

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