CLC-DRCS7-PCASM

National Semiconductor

CLC-DRCS7-PCASM Datasheet

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The DRCS7 Evaluation Board (CLC-DRCS7-PCASM) supports complete evaluation of the Diversity Receiver Chipset (DRCS). The Diversity Receiver Chipset (DRCS) is an IF sampling receiver optimized for GSM/EDGE and IS-136/EDGE systems. It provides the extreme dynamic range required for EDGE through a novel AGC-based architecture. The chipset consists of two CLC5526 Digital Variable Gain Amplifiers (DVGAs), two CLC5957 Analog-to-Digital Converters (ADCs), and one CLC5902 Dual Digital Tuner/AGC. The DRCS7 Board accepts narrowband signals at first IF frequencies up to 300MHz (standard configuration is for 150MHz), and outputs quadrature baseband signals in a digital format. Configuration of the Dual Digital Tuner/AGC is controlled by a COP8 micro-controller. Several useful configurations can be directly loaded by the COP8 or specialized configurations can be created and loaded with the provided DRCS Control Panel software (drcscp.exe). This evaluation board connects directly to the data capture board (CLC-CAPT-PCASM). The data capture board enables the user to transfer data from the outputs of the DRCS over the serial port of a PC and into a file. It also includes MATLABŪ script files to aid in the analysis of this data.

CLC-CAPT-PCASM, CLC5526, CLC5526MSA, CLC5526MSAX, CLC5526PCASM